Research and Development Engineer jobs in Portsmouth, OH

Embedded Security Engineer to work alongside our US Air Force (USAF) and Department of Defense (DoD) partners to develop tamper protected microelectronic devices and intellectual property (IP). You will be embedded with the USAF team to learn state-of-the-art attacks and countermeasures, attend technical interchange meetings, perform laboratory evaluations, and provide critical feedback throughout the product development life cycle to ensure successful outcomes. The ideal candidate is an organized, self-starter, capable of contributing to multiple projects in parallel, and eager to learn. This position is located at WPAFB, Ohio. All Riverside Research opportunities require U.S. Citizenship. Job Responsibilities: Attends technology interchange meetings at DoD and contractor sites
Provides subject matter expertise in state-of-the-art implementation attacks
Interacts with third-party vendors to collect appropriate source information
Analyzes secure architectures to identify vulnerabilities
Develops and implements plans for accomplishing DoD technology development goals
Documents findings in technical reports and presentations
Develops, maintains, adjusts, and reports on project schedules and timelines
Attends conferences to understand new attacks and protections
Travel between 10-50% of time anticipated
Other duties as assigned
Required Qualifications: Active Top Secret security clearance
BS 4 years, MS 2 years, or PhD with 0 years of industry experience in Electrical Engineering, Computer Engineering, or comparable STEM field
Experience with Verilog, VHDL, or SystemC
Experience designing or working with security features of FPGAs or ASICs
Experience bare-metal programming microcontrollers or microprocessors
Proficiency in C, C , or Python
Proficient in creating technical reports and presentations
Willing to travel for multi-day meetings and conferences
Desired Qualifications: Strong understanding of cryptographic algorithms and protocols
Strong understanding of implementation attacks including side-channel, glitching, etc.
Experience implementing side-channel countermeasures
Understanding of sub-100 nm CMOS and FinFET device fabrication, assembly, and packaging including 3DICs
Experience working in an R&D environment solving open-ended problems
Experience in project management including scheduling and reporting